Title :
A low power CMOS Voltage Controlled Oscillator in 65 nm technology
Author :
Sharma, Ashok ; Saurabh ; Biswas, Santosh
Author_Institution :
Electron. & Commun. Eng, LNM Inst. of Inf. Technol., Jaipur, India
Abstract :
Wireless device portability and power efficiency are the two major challenges in modern device modeling. Voltage Controlled Oscillator (VCO) is one the most essential circuit used in wireless systems. A new three stage VCO design in 65nm technology is proposed in this paper and is compared with previous best Current starved VCO design on the basis of on-chip area utilization and power consumption. The measured tuning range of the proposed VCO design is 0.83 to 3.77 GHz and it is around 30-33% energy efficient than the previous best design. The new proposed VCO design uses 67.65 μm2 area which is 40.75% less than the chip area required for the fabrication of current starved VCO design.
Keywords :
CMOS analogue integrated circuits; integrated circuit design; low-power electronics; voltage-controlled oscillators; current starved VCO design; low power CMOS voltage controlled oscillator; on-chip area utilization; power consumption; size 65 nm; three stage VCO design; CMOS integrated circuits; Delays; Inverters; Ring oscillators; Voltage-controlled oscillators; Wireless communication; CMOS; Current-starved VCO; phase shift; ring oscillator;
Conference_Titel :
Computer Communication and Informatics (ICCCI), 2014 International Conference on
Conference_Location :
Coimbatore
Print_ISBN :
978-1-4799-2353-3
DOI :
10.1109/ICCCI.2014.6921794
