Title :
A 21-mW 8-b 125-MSample/s ADC in 0.09-mm2 0.13-μm CMOS
Author :
Mulder, Jan ; Ward, Christopher M. ; Lin, Chi-Hung ; Kruse, David ; Westra, Jan R. ; Lugthart, Marcel ; Arslan, Erol ; Van De Plassche, Rudy J. ; Bult, Klaas ; Van der Goes, Frank M L
Author_Institution :
Broadcom Netherlands, Bunnik, Netherlands
Abstract :
This paper presents an 8-b two-step subranging analog-to-digital (ADC) using interpolation, averaging, offset compensation, and pipelining techniques to accomplish an effective number of bits of 7.6 b at 125 MSample/s. The 0.13-μm CMOS ADC occupies 0.09 mm2 and consumes 21 mW.
Keywords :
CMOS analogue integrated circuits; analogue-digital conversion; integrated circuit design; pipeline arithmetic; 0.13 micron; 21 mW; 8 bits; CMOS analog integrated circuits; analog-to-digital converter; averaging; interpolation; offset compensation; pipelining techniques; Analog-digital conversion; CMOS process; CMOS technology; Clocks; Delay; Energy consumption; Pipeline processing; Quantization; Switches; Voltage; 65; ADC; Analog-to-digital conversion; CMOS analog integrated circuits; ICs; subranging analog-to-digital converter;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2004.836235