DocumentCode :
1172763
Title :
A burst-mode receiver for 1.25-Gb/s ethernet PON with AGC and internally created reset signal
Author :
Le, Quan ; Lee, Sang-Gug ; Oh, Yong-Hun ; Kang, Ho-Yong ; Yoo, Tae-Hwan
Author_Institution :
Inf. & Commun. Univ., Daejeon, South Korea
Volume :
39
Issue :
12
fYear :
2004
Firstpage :
2379
Lastpage :
2388
Abstract :
This paper presents a burst-mode receiver for 1.25-Gb/s Ethernet PON system using mixed-mode CMOS 0.18-μm technology. With the modified cell-based AGC function and differential feed-forward topology, the receiver achieves sensitivity of -26.4 dBm, overload of -5.4 dBm, and a loud/soft ratio of 21 dB while keeping the low-voltage positive emitter-coupled logic (LVPECL) differential output level fully compliant with the ethernet passive optical network (EPON) standard. Unlike other burst-mode receivers, the design obtains fast response even without a reset signal from the network layer by creating a reset signal internally based on the incoming signal. This setting allows for simple system design. The overall architecture and several blocks are optimized in accordance with internal reset creation. Minimum guard time and preamble time are 250 and 50 ns, respectively; all timing parameters are better than the current EPON standard. The prototype contains all components on-chip that occupies 0.9×1.9 mm2 and consumes 160 mA current from a 3.3-V supply.
Keywords :
CMOS integrated circuits; automatic gain control; emitter-coupled logic; feedforward; optical fibre LAN; passive networks; sensitivity; 0.18 micron; 1.25 Gbit/s; 160 mA; 250 ns; 3.3 V; 50 ns; Ethernet passive optical network; burst-mode receiver; cell-based AGC; feed-forward topology; low-voltage positive emitter-coupled logic; mixed-mode CMOS; optical communication; reset signal; CMOS logic circuits; CMOS technology; EPON; Ethernet networks; Feedforward systems; Network topology; Optical receivers; Passive optical networks; Signal design; Timing; 65; Burst-mode; EPON; cell-based AGC; feed-forward; optical communication; reset;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/JSSC.2004.835644
Filename :
1362846
Link To Document :
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