120-Gb/s multiplexing and 110-Gb/s demultiplexing ICs

Author

Suzuki, Yasuyuki ; Yamazaki, Zin ; Amamiya, Yasushi ; Wada, Shigeki ; Uchida, Hiroaki ; Kurioka, Chiharu ; Tanaka, Shinichi ; Hida, Hikaru

Author_Institution

Syst. Devices Res. Labs., NEC Corp., Ibaraki, Japan

Volume

39

Issue

12

fYear

2004

Firstpage

2397

Lastpage

2402

Abstract

InP HBT ICs capable of 120-Gb/s multiplexing and 110-Gb/s demultiplexing operation have been developed. They feature a direct-drive series-gating configuration selector, an asymmetrical latch flip-flop, and broadband impedance matching with inverted microstrip lines. Their input sensitivity is less than 100 mV_pp, and the output swing is more than 400 mV_pp. To the best of our knowledge, this result is the highest data rate operation reported for electronic ICs. Moreover, an error-free multiplexing and demultiplexing operation at 100 Gb/s was demonstrated.

Keywords

III-V semiconductors; demultiplexing; flip-flops; heterojunction bipolar transistors; impedance matching; integrated circuits; logic gates; microstrip lines; multiplexing; HBT IC; InP; asymmetrical latch flip-flop; broadband impedance matching; demultiplexing; direct-drive series-gating configuration selector; error-free operation; microstrip lines; multiplexing; optical transmission system; Bandwidth; Demultiplexing; Flip-flops; HEMTs; Heterojunction bipolar transistors; Impedance matching; Indium phosphide; Latches; Microstrip; Mirrors; 65; Demulutiplexing; InP HBT; error-free operation; flip-flop; impedance matching; multiplexing; optical transmission system; selector;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/JSSC.2004.835647

Filename

1362848