Title :
120-Gb/s multiplexing and 110-Gb/s demultiplexing ICs
Author :
Suzuki, Yasuyuki ; Yamazaki, Zin ; Amamiya, Yasushi ; Wada, Shigeki ; Uchida, Hiroaki ; Kurioka, Chiharu ; Tanaka, Shinichi ; Hida, Hikaru
Author_Institution :
Syst. Devices Res. Labs., NEC Corp., Ibaraki, Japan
Abstract :
InP HBT ICs capable of 120-Gb/s multiplexing and 110-Gb/s demultiplexing operation have been developed. They feature a direct-drive series-gating configuration selector, an asymmetrical latch flip-flop, and broadband impedance matching with inverted microstrip lines. Their input sensitivity is less than 100 mVpp, and the output swing is more than 400 mVpp. To the best of our knowledge, this result is the highest data rate operation reported for electronic ICs. Moreover, an error-free multiplexing and demultiplexing operation at 100 Gb/s was demonstrated.
Keywords :
III-V semiconductors; demultiplexing; flip-flops; heterojunction bipolar transistors; impedance matching; integrated circuits; logic gates; microstrip lines; multiplexing; HBT IC; InP; asymmetrical latch flip-flop; broadband impedance matching; demultiplexing; direct-drive series-gating configuration selector; error-free operation; microstrip lines; multiplexing; optical transmission system; Bandwidth; Demultiplexing; Flip-flops; HEMTs; Heterojunction bipolar transistors; Impedance matching; Indium phosphide; Latches; Microstrip; Mirrors; 65; Demulutiplexing; InP HBT; error-free operation; flip-flop; impedance matching; multiplexing; optical transmission system; selector;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2004.835647
