DocumentCode
1187158
Title
A novel technique for fabricating high reliable trench DMOSFETs using self-align technique and hydrogen annealing
Author
Kim, Jongdae ; Roh, Tae Moon ; Kim, Sang-Gi ; Park, Il-Yong ; Lee, Bun
Author_Institution
Basic Res. Lab., Electron. & Telecommun. Res. Inst., Taejon, South Korea
Volume
50
Issue
2
fYear
2003
Firstpage
378
Lastpage
383
Abstract
A novel technique for fabricating high reliability trench DMOSFETs using three mask layers is realized to obtain cost-effective production capability, higher cell density and current driving capability, and higher reliability. This technique provides a unit cell with 2.3∼2.4 μm pitch and a channel density of 100 Mcell/in2. Specific on-resistance is 0.36 mΩ·cm2 with a blocking voltage of 43 V at a gate voltage of 10 V and 5 A source-to-drain current. The time to breakdown of gate oxide grown on the hydrogen annealed trench surface is much longer than that of oxide grown on a nonhydrogen annealed trench surface.
Keywords
annealing; power MOSFET; semiconductor device breakdown; semiconductor device reliability; semiconductor technology; 10 V; 2.3 to 2.4 micron; 43 V; 5 A; blocking voltage; cell density; channel density; cost-effective production capability; current driving capability; gate oxide time to breakdown; gate voltage; high reliability trench DMOSFETs; hydrogen annealing; mask layers; self-align technique; source-to-drain current; specific on-resistance; trench surface; unit cell; Annealing; Etching; Fabrication; Hydrogen; MOSFET circuits; Moon; Power MOSFET; Production; Silicon; Voltage;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2002.807442
Filename
1196081
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