DocumentCode :
1190112
Title :
A Minimization Technique for Multiple-Valued Logic Systems
Author :
Allen, Charles M. ; Givone, Donald D.
Author_Institution :
IEEE
Issue :
2
fYear :
1968
Firstpage :
182
Lastpage :
184
Abstract :
Abstract—An algebra for switching circuits that may have multiple values is introduced. A minimization technique suitable for computer implementation is then presented.
Keywords :
Index terms—Combinational circuits, iterated consensus, minimization, multiple-valued logic, multiple-valued switching functions, switching algebra.; Boolean algebra; Diodes; Information systems; Input variables; Logic circuits; Logic devices; Logic functions; Mathematical model; Minimization methods; Switching circuits; Index terms—Combinational circuits, iterated consensus, minimization, multiple-valued logic, multiple-valued switching functions, switching algebra.;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1968.227407
Filename :
1687309
Link To Document :
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