DocumentCode
119081
Title
Intel enterprise server processor packaging challenge and future trend
Author
Zhao, Rong
Author_Institution
Data Center Group, Intel Corp., Hillsboro, OR, USA
fYear
2014
fDate
12-15 Aug. 2014
Firstpage
1516
Lastpage
1521
Abstract
Processor package has played significant role during Intel server´s historic path. From the early front side bus (FSB) interconnect with north bridge chipset to the current quick path interconnect (QPI), server package architecture and design have met the challenge at each step. This paper summarized what we have done to implement quad core multi-chip package with compatible platform, develop multi-package socket with compressed Hex pattern, implement air core inductor to support Fully Integrated Voltage Regulator (FIVR) and create the Patch on Interposer (PoINT) technology to meet the product need and still maintain the low cost. At the end, future Intel server challenge and trend is discussed.
Keywords
integrated circuit interconnections; integrated circuit packaging; microprocessor chips; voltage regulators; FIVR; FSB; Intel enterprise server processor packaging; PoINT technology; QPI; air core inductor; compressed Hex pattern; front side bus interconnect; fully integrated voltage regulator; multipackage socket; patch on interposer; quad core multichip package; quick path interconnect; server package architecture; server package design; Central Processing Unit; Inductors; Integrated circuit interconnections; Servers; Silicon; Sockets; Substrates; FIVR; FSB; Hex pattern; PoINT; package; processor; socket;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Packaging Technology (ICEPT), 2014 15th International Conference on
Conference_Location
Chengdu
Type
conf
DOI
10.1109/ICEPT.2014.6922942
Filename
6922942
Link To Document