Abstract :
Abstract—A "synthesis technique" is presented for "realizing" any arbitrary binary input-binary output "synchronous sequential Moore machine" in the form of a network composed of identical 2-state "component machines." With slight modification the synthesis technique presented can be used to realize any given n-input-p-output synchronous sequential Moore machine in the form of a network composed of identical 2-state component machines.
Keywords :
Index terms—Component machines, decompostion, finite-state automata, logical completeness, realization, sequential machines, synchronous sequential Moore machines.; Automata; Delay; Logic; Missiles; Network synthesis; Pediatrics; Sufficient conditions; Switching circuits; Index terms—Component machines, decompostion, finite-state automata, logical completeness, realization, sequential machines, synchronous sequential Moore machines.;
