Title :
A new realizability condition for limit cycle-free state-space digital filters employing saturation arithmetic
fDate :
10/1/1985 12:00:00 AM
Abstract :
A criterion for the absence of zero-input limit cycles in state-space digital filters employing saturation arithmetic is presented. An example is given, which brings out the novelity of the present approach.
Keywords :
Recursive digital filter wordlength effects; Circuit stability; Digital arithmetic; Digital filters; Limit-cycles; Linear matrix inequalities; Multidimensional signal processing; Nonlinear filters; Speech processing; Symmetric matrices; Testing;
Journal_Title :
Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCS.1985.1085612
