DocumentCode :
1191692
Title :
Error-Checking Logic for Arithmetic-Type Operations of a Processor
Author :
Rao, Thammavarapu R.N.
Author_Institution :
IEEE
Issue :
9
fYear :
1968
Firstpage :
845
Lastpage :
849
Abstract :
Abstract—A method of extending the usefulness of residue coding (or congruence checking) to check for errors in operations such as complement, shift, and rotate (or cycle) is presented. The checking logic and a practical method for its implementation are derived. The cost of check circuitry is only of the order of 30 to 40 percent of the part of the processor that is subjected to checking. In another paper presently under review, a method for single error correction using a new code called "bi-residue code" is presented.
Keywords :
Index Terms—Congruence checking, error-checking circuitry, residue coding, residue generator, self-checking processors.; Arithmetic; Attenuation; Circuits; Computer errors; Delay effects; Delay lines; Frequency; Logic; Magnetic recording; Registers; Index Terms—Congruence checking, error-checking circuitry, residue coding, residue generator, self-checking processors.;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/TC.1968.229144
Filename :
1687471
Link To Document :
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