Title :
Correction to ´Signal Delay in RC Mesh Networks´
fDate :
6/1/1985 12:00:00 AM
Keywords :
Adders; Circuits; Concurrent computing; Equations; Mesh networks; Packaging; Registers; Resistors; Signal design; Transforms;
Journal_Title :
Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCS.1985.1085747
