DocumentCode :
1194083
Title :
Single-wafer/mini-batch approach for fast cycle time in advanced 300-mm fab
Author :
Bonnin, Olivier ; Mercier, Dominique ; Levy, Didier ; Henry, Martin ; Pouilloux, Isabelle ; Mastromatteo, Eric
Author_Institution :
STMicroelectronics, Crolles, France
Volume :
16
Issue :
2
fYear :
2003
fDate :
5/1/2003 12:00:00 AM
Firstpage :
111
Lastpage :
120
Abstract :
Advanced 300-mm application specific integrated circuit/system-on-chip (ASIC/SOC) fabs with multiproduct and multiprocess models will require both a high level of flexibility and efficiency to achieve cost effective manufacturing cycle times. One of the main detractors for cycle time and fab flexibility is a batching requirement on certain types of processing that makes lots waiting for the batch to be completed and generates wip bubbles downstream. This paper reviews the front-end steps within a semiconductor manufacturing flow where batching requirements may be replaced by single-wafer or mini-batch alternatives for improved cycle time. Encouraging process results for front-end applications for potential single-wafer replacements are presented. It is demonstrated that single-wafer oxidation, LPCVD and cleaning offer a large potential cycle time gain but currently have different levels of maturity as potential batch technology replacements. In addition to the process feasibility, a DOE based on dynamic simulation is conducted enabling the quantification of potential gains in cycle time obtained by switching to single-wafer or mini-batch strategy instead of batch strategy, preferring integrated metrology and reducing mini-lots size. It shows that, in comparison to the baseline model (100%), the manufacturing cycle time may decrease down to 65% for mini-lots and to 78% for standard production lots.
Keywords :
application specific integrated circuits; batch processing (industrial); chemical vapour deposition; design of experiments; integrated circuit manufacture; oxidation; surface cleaning; system-on-chip; 300 mm; ASIC/SOC fab; LPCVD; batch processing; cleaning process; cycle time; design of experiments; dynamic simulation; fab flexibility; front-end system; integrated metrology; mini-batch processing; mini-lot size; multiprocess model; multiproduct model; oxidation; semiconductor manufacturing; single-wafer processing; Application specific integrated circuits; Cleaning; Costs; Integrated circuit manufacture; Integrated circuit modeling; Oxidation; Pulp manufacturing; Semiconductor device manufacture; System-on-a-chip; Virtual manufacturing;
fLanguage :
English
Journal_Title :
Semiconductor Manufacturing, IEEE Transactions on
Publisher :
ieee
ISSN :
0894-6507
Type :
jour
DOI :
10.1109/TSM.2003.810920
Filename :
1198017
Link To Document :
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