Title :
An analysis of charge-pump phase-locked loops
Author_Institution :
Intel Corp., Folsom, CA, USA
Abstract :
The charge pump phase-locked loops with a digital sequential phase frequency detector are analyzed using linear and nonlinear models. Nonlinear analytical maps are derived. The stability analysis results agree with linear analysis results, with higher order corrections. The effects of the loop delay are also discussed.
Keywords :
delay lock loops; delays; linear network analysis; nonlinear network analysis; phase detectors; phase locked loops; charge pump; digital sequential phase frequency detector; higher order corrections; linear analysis; linear model; loop delay; nonlinear analytical maps; nonlinear model; phase locked loops; stability analysis; Charge pumps; Delay effects; Frequency conversion; Phase detection; Phase frequency detector; Phase locked loops; Signal analysis; Transfer functions; Voltage control; Voltage-controlled oscillators; Charge-pump phase-locked loop (PLL); phase dynamics; stability;
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
DOI :
10.1109/TCSI.2005.852934
