DocumentCode :
1198860
Title :
Transient fault-tolerance through algorithms
Author :
Saha, Goutam Kumar
Volume :
25
Issue :
5
fYear :
2006
Firstpage :
25
Lastpage :
30
Abstract :
This article describes that single-version enhanced processing logic or algorithms can be very effective in gaining dependable computing through hardware transient fault tolerance (FT) in an application system. Transients often cause soft errors in a processing system resulting in mission failure. Errors in program flow, instruction codes, and application data are often caused by electrical fast transients. However, firmware and software fixes can have an important role in designing an ESD, or EMP-resistant system and are more cost effective than hardware. This technique is useful for detecting and recovering transient hardware faults or random bit errors in memory while an application is in execution. The proposed single-version software fix is a practical, useful, and economic tool for both offline and online memory scrubbing of an application system without using conventional N versions of software (NVS) and hardware redundancy in an application like a frequency measurement system
Keywords :
electrical engineering computing; electromagnetic pulse; electrostatic discharge; fault tolerant computing; firmware; transient analysis; EMP-resistant system; ESD; application system; economic tool; electrical fast transient; firmware; instruction code; mission failure; offline-online memory scrubbing; program flow; single-version enhanced processing; transient fault tolerance computing; Application software; Costs; Electrical fault detection; Electrostatic discharge; Fault tolerance; Fault tolerant systems; Hardware; Logic; Microprogramming; Software tools;
fLanguage :
English
Journal_Title :
Potentials, IEEE
Publisher :
ieee
ISSN :
0278-6648
Type :
jour
DOI :
10.1109/MP.2006.1692282
Filename :
1692282
Link To Document :
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