DocumentCode
1199294
Title
A system architecture for multi-level decision feedback equalization
Author
Kenney, John G.
Author_Institution
Dept. of Electr. & Comput. Eng., Oregon State Univ., Corvallis, OR, USA
Volume
30
Issue
6
fYear
1994
fDate
11/1/1994 12:00:00 AM
Firstpage
4218
Lastpage
4220
Abstract
System issues such as clock recovery, automatic gain control and determination of the filter coefficients for both the forward and backward equalizers are examined for multi-level decision feedback equalization (MDFE). A software implementation on 2/3(1,7) RLL coded data stored at a bit density of 1.67 PW50 and retrieved by an MR head demonstrate the implementation of a channel based on MDFE
Keywords
automatic gain control; decision feedback equalisers; digital magnetic recording; magnetic heads; magnetoresistive devices; runlength codes; 2/3(1,7) RLL coded data; MR head; automatic gain control; backward equalizers; bit density; clock recovery; filter coefficients; forward equalizers; magnetic recording; multi-level decision feedback equalization; software implementation; Clocks; Decision feedback equalizers; Delay; Detectors; Filters; Gain control; Information retrieval; Magnetic heads; Phase detection; Phase locked loops;
fLanguage
English
Journal_Title
Magnetics, IEEE Transactions on
Publisher
ieee
ISSN
0018-9464
Type
jour
DOI
10.1109/20.334040
Filename
334040
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