DocumentCode
1200147
Title
Embedded-memory test and repair: infrastructure IP for SoC yield
Author
Zorian, Yervant ; Shoukourian, Samvel
Volume
20
Issue
3
fYear
2003
Firstpage
58
Lastpage
66
Abstract
Today´s complex SoCs need sophisticated infrastructure IP, not only to test and diagnose embedded memories but also to repair them and improve fabrication yield. The authors solution integrates memory IP with test and repair IP in a composite infrastructure IP that ensures manufacturing and field repair efficiency and optimizes SoC yield.
Keywords
built-in self test; integrated circuit testing; integrated memory circuits; system-on-chip; SoC yield; embedded-memory test; fabrication yield; field repair; infrastructure IP; Algorithm design and analysis; Design optimization; Fabrication; Failure analysis; Feedback loop; Logic design; Logic testing; Manufacturing; Qualifications; Random access memory;
fLanguage
English
Journal_Title
Design & Test of Computers, IEEE
Publisher
ieee
ISSN
0740-7475
Type
jour
DOI
10.1109/MDT.2003.1198687
Filename
1198687
Link To Document