DC Design of Resistance-Coupled Transistor Logic Circuits

Worst-case de design equations for resistance coupled transistor logic circuits are presented and discussed. A solution is chosen in a form which provides for setting switching transient times in advance of calculating the dc design. All constants are discussed, and the algebraic solution is obtained for values of the unknown resistors and voltages. A numerical example illustrates a typical design with five inputs and five outputs, using the type GT-759 transistor.