DocumentCode :
1203965
Title :
A C-testable carry-free divider
Author :
Srinivas, H.R. ; Vinnakota, Bapiraju ; Parhi, Keshab K.
Author_Institution :
Dept. of Electr. Eng., Minnesota Univ., Minneapolis, MN, USA
Volume :
2
Issue :
4
fYear :
1994
Firstpage :
472
Lastpage :
488
Abstract :
In this paper, the design of a C-testable, high-performance carry-free array divider is presented. A radix-2 redundant number based carry-free divider is considered and is modified to make it C-testable, i.e., it can be exhaustively tested using a constant number of test vectors irrespective of its word-length. Previous C-testable designs considered dividers which used carry-propagate adders/subtractors. These dividers are slow because of their O(W/sup 2/) computation time (where W is the word-length of the divider). High-performance carry-free dividers use carry-free redundant arithmetic adders/subtractors. Due to this feature, they have O(W) computation time. The on-the-fly converter used by carry-free dividers to convert the redundant quotient to two´s-complement form is shown to be not C-testable. It is modified to be linear-testable (in word-length) instead of exponential time required for exhaustive testing of all possible combinations at its inputs. We conclude that the number of test vectors needed is 99 for C-testing of the divider array and (3W+10) for linear testing of the converter. The hardware overhead required to make the divider C-testable and the on-the-fly converter linear testable is also shown to be nominal.<>
Keywords :
design for testability; digital arithmetic; dividing circuits; logic arrays; logic design; logic testing; C-testable carry-free divider; C-testing; carry-free array divider; divider array; linear testing; linear-testable convertor; on-the-fly converter; radix-2 redundant number; redundant arithmetic adders/subtractors; test vectors; Arithmetic; Hardware; Logic arrays; Logic devices; Logic gates; Logic testing; Signal processing; Vectors; Very large scale integration;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/92.335015
Filename :
335015
Link To Document :
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