A High-Speed Data Acquisition Subsystem

Many problems inherent in signal acquisition using laboratory minicomputers are overcome by using a high-speed data acquisition subsystem incorporating a large buffer memory. A structured systems development methodology details the design stages of this subsystem and its interfaces. Key to implementation of the design is a dual-port solid-state disk (extended memory unit). The subsystem operates at acquisition rates up to 125 000 samples/s and can be extended to 500 000 samples/s; its design permits operation with any real-time or time-shared operating system.