Switched-capacitor FIR filters-a feasibility study

Author

Fischer, Godi

Author_Institution

Dept. of Electr. & Comput. Eng., Rhode Island Univ., Kingston, RI, USA

Volume

41

Issue

12

fYear

1994

fDate

12/1/1994 12:00:00 AM

Firstpage

823

Lastpage

827

Abstract

This paper presents the design and the implementation of three different switched-capacitor FIR filter topologies: a 2-phase direct-form implementation and two poly-phase cascade realizations based on second and fourth order building blocks. The two cascade approaches employ a 3-phase and a 6-phase clocking scheme, respectively. Each method is illustrated by a numerical example and results from silicon prototype circuits are presented. The practical results demonstrate the viability of the proposed implementations and reveal the area and power efficiency of the presented cellular FIR filter approaches

Keywords

FIR filters; cascade networks; switched capacitor filters; 2-phase direct-form implementation; 3-phase clocking scheme; 6-phase clocking scheme; Si; analog FIR filters; area efficiency; cellular FIR filter; design; fourth order building blocks; poly-phase cascade realization; power efficiency; second order building blocks; silicon prototype circuits; switched-capacitor FIR filter; topologies; CMOS process; Charge-coupled image sensors; Circuit topology; Clocks; Electrodes; Finite impulse response filter; Operational amplifiers; Prototypes; Silicon; Transversal filters;

fLanguage

English

Journal_Title

Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on

Publisher

ieee

ISSN

1057-7130

Type

jour

DOI

10.1109/82.338626

Filename

338626