DocumentCode :
1216257
Title :
Design procedure for two-stage CMOS operational amplifiers employing current buffer
Author :
Mahattanakul, J.
Author_Institution :
Electron. Eng. Dept., Mahanakorn Univ. of Technol., Bangkok, Thailand
Volume :
52
Issue :
11
fYear :
2005
Firstpage :
766
Lastpage :
770
Abstract :
The design procedure of the two-stage CMOS operational amplifiers employing Miller capacitor in conjunction with the common-gate current buffer is presented. Unlike the previously reported design strategy of the opamp of this type, which results in the opamp with a pair of nondominant complex conjugate poles and a finite zero, the proposed procedure is based upon the design strategy that results in the opamp with only one dominant pole. Design example of the proposed procedure is given.
Keywords :
CMOS analogue integrated circuits; buffer circuits; integrated circuit design; operational amplifiers; poles and zeros; CMOS analog integrated circuit; common-gate current buffer; frequency compensation; nondominant complex conjugate poles; two-stage CMOS operational amplifiers; Capacitors; Circuits; Damping; Feedback; Feedforward systems; Frequency; Operational amplifiers; Poles and zeros; Resistors; Stability; CMOS analog integreated circuit; frequency compensation; operational amplifier; poles and zeros;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-7747
Type :
jour
DOI :
10.1109/TCSII.2005.852530
Filename :
1532452
Link To Document :
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