Title :
Design and implementation of reconfigurable filter
Author :
Veljanovski, R. ; Singh, J. ; Faulkner, M.
Author_Institution :
Centre for Telecommun. & Microelectron., Victoria Univ., Melbourne, Vic., Australia
fDate :
5/15/2003 12:00:00 AM
Abstract :
Control unit design, dynamic analysis and VLSI implementation of a reconfigurable digital filter for an UTRA-TDD mobile receiver are described. A 60% average power reduction is recorded for the receiver filter compared to a static length filter meeting 3GPP specifications.
Keywords :
VLSI; application specific integrated circuits; digital filters; digital integrated circuits; mobile radio; radio receivers; 3GPP specifications; UMTS terrestrial radio access; UTRA-TDD mobile receiver; VLSI implementation; control unit design; dynamic analysis; power reduction; reconfigurable digital filter; time division duplex environment;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20030486
