Title :
On the Design of the Triple-Resonance Interstage Network
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol. Delhi, Delhi
Abstract :
The triple resonance network has emerged as a promising candidate for interstage bandwidth enhancement in cascaded CMOS amplifiers. This paper presents several design procedures for such networks, subject to the condition of moderate (1 dB) or no peaking in the passband, for the case where the devices can be chosen or designed, as well as the case in which the devices are given.
Keywords :
CMOS analogue integrated circuits; band-pass filters; integrated circuit design; cascaded CMOS amplifiers; network theory; triple-resonance interstage network; wide-band amplifier; Bandwidth enhancement; interstage networks; network theory; triple resonance; wide-band amplifier;
Journal_Title :
Circuits and Systems II: Express Briefs, IEEE Transactions on
DOI :
10.1109/TCSII.2008.923416
