Title :
500-V n-channel insulated-gate bipolar transistor with a trench gate structure
Author :
Chang, H.R. ; Baliga, Jayant B.
Author_Institution :
General Electr. Corp. Res. & Dev. Center, Schenectady, NY, USA
fDate :
9/1/1989 12:00:00 AM
Abstract :
An improved insulated-gate bipolar transistor (IGBT) with a trench gate structure that demonstrates a low forward voltage drop of 1.2 V at a forward conduction current density of 200 A/cm2 is described. This device structure was fabricated using a self-aligned process that permits closely spaced vertical trench gates with a unit cell of 6 μm. This allows for a fivefold increase of channel density and elimination of the parasitic JFET effect, thus reducing the forward voltage drop significantly. A static latching current density of 2700 A/cm2 has been achieved in the UMOS-IGBT. Two-dimensional computer simulations of the UMOS-IGBT have been performed to identify the optimal cell design. This optimal design is predicted to increase the SOA current density by a factor of 2.9 over the state-of-the-art DMOS-IGBT
Keywords :
bipolar transistors; insulated gate field effect transistors; power transistors; 500 V; IGBT; SAG process; UMOS-IGBT; forward voltage drop; insulated-gate bipolar transistor; n-channel; optimal cell design; power transistor; self-aligned process; trench gate structure; Breakdown voltage; Computer simulation; Current density; Helium; Insulated gate bipolar transistors; Insulation; Low voltage; Power semiconductor devices; Research and development; Semiconductor optical amplifiers;
Journal_Title :
Electron Devices, IEEE Transactions on
