Title :
A 14 mW 2.5 MS/s 14 bit Σ∆ Modulator Using Split-Path Pseudo-Differential Amplifiers
Author :
Cao, Zhiheng ; Song, Tongyu ; Yan, Shouli
Author_Institution :
Texas Univ., Austin
Abstract :
This paper presents the design and experimental results of a 1.25 MHz signal bandwidth 14 bit CMOS SigmaDelta modulator. With our proposed switched-capacitor split-path pseudo-differential amplifiers, this modulator achieves high power efficiency, high sampling frequency, and small die area. A new signal and reference front-end sampling network eliminates the input common-mode voltage and reduces power consumption and linearity requirement of the opamp. A prototype chip has been designed and fabricated in a 0.25 mum CMOS technology with a core area of 0.27 mm2. Experimental results show that an 84 dB dynamic range is achieved over a 1.25 MHz signal bandwidth when clocked at 125 MHz. The power dissipation is 14 mW at 2.4 V including on-chip voltage reference buffers.
Keywords :
CMOS integrated circuits; differential amplifiers; sigma-delta modulation; switched capacitor networks; CMOS SigmaDelta modulator; CMOS technology; bandwidth 1.25 MHz; front-end sampling network; high power efficiency; high sampling frequency; linearity requirement; power 14 mW; size 0.25 mum; split-path pseudo-differential amplifiers; switched-capacitor amplifiers; voltage 2.4 V; word length 14 bit; Bandwidth; CMOS technology; Energy consumption; Frequency; High power amplifiers; Linearity; Prototypes; Sampling methods; Signal design; Voltage; Analog-to-digital conversion; CMOS analog integrated circuits; FIR feedback DAC; class AB; low-power electronics; noise shaping; oversampling A/D conversion; power efficient circuits; push-pull; sigma-delta modulation; switched-capacitor circuits;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2007.905241