DocumentCode :
1228235
Title :
Computer Techniques for Solving Electric Circuits for Fault Isolation
Author :
Berkowitz, R.S. ; Krishnaswamy, P.B.
Author_Institution :
Institute for Cooperative Research and the Moore School of Electrical Engineering University of Pennsylvania Philadelphia 4, Pa.
Volume :
1
Issue :
2
fYear :
1963
Firstpage :
1090
Lastpage :
1099
Abstract :
We are concerned in this paper with use of a digital computer for automatic checkout and fault isolation of electrical networks. The work reported here represents a refinement and extension of work done in a previous paper. Section 2 to follow gives a discussion of our circuit test philosophy and some of its immediate implications. Section 3 contains a review of previous work giving the required manipulations in compact matrix form. A new program for extended implementation of this procedure is given in section 4. Some results obtained by this program are presented in section 5. Section 6 presents a method whereby all analysis required for electric networks can be performed automatically working only from basic schematic diagram information. Conclusions and some future research plans are outlined in section 7.
Keywords :
Circuit analysis computing; Circuit faults; Circuit testing; Computer networks; Information analysis; Measurement errors; Military computing; Nonlinear equations; Performance analysis; Writing;
fLanguage :
English
Journal_Title :
Aerospace, IEEE Transactions on
Publisher :
ieee
ISSN :
0536-1516
Type :
jour
DOI :
10.1109/TA.1963.4319481
Filename :
4319481
Link To Document :
بازگشت