• DocumentCode
    1229005
  • Title

    Warpage-induced lithographic limitations of FR-4 and the need for novel board materials for future microvia and global interconnect needs

  • Author

    Banerji, Sounak ; Raj, P. Markondeya ; Bhattacharya, Swapan ; Tummala, Rao R.

  • Author_Institution
    Packaging Res. Center, Georgia Inst. of Technol., Atlanta, GA
  • Volume
    28
  • Issue
    1
  • fYear
    2005
  • Firstpage
    102
  • Lastpage
    113
  • Abstract
    The effect of warpage on lithographic capabilities of organic circuit boards with multilayered thin film buildup was investigated. Two to six epoxy layers were built on various candidate boards to characterize the warpage and correlate it with analytical models. Underlying mechanisms were investigated and novel parameters defined to correlate warpage with photodefinition of ultrafine lines and vias on the board. Based on the experiments, warpage specifications for the multifunctional multilayered requirements in a proposed system-on-package (SOP) structure were defined. Experimentally validated FEM models were used to estimate the warpage during the multilayered buildup. Results show that FR-4 is not suitable for future high-density packaging needs and underscore the need for stiffer ceramic-based circuit board materials as replacement for FR-4
  • Keywords
    finite element analysis; integrated circuit interconnections; integrated circuit packaging; lithography; printed circuits; technological forecasting; FEM; FR-4; ceramic-based circuit board materials; global interconnect; high-density packaging; high-density wiring; microvia interconnect; multifunctional multilayered requirements; multilayered thin film; organic circuit boards; printed wiring board; system-on-package structure; ultrafine fines; ultrafine vias; warpage specifications; warpage-induced lithographic limitations; Costs; Electronics packaging; Integrated circuit interconnections; Integrated circuit packaging; Organic materials; Printed circuits; Routing; Semiconductor device packaging; Wafer scale integration; Wiring; FR4; global interconnects; high-density wiring; misregistration; printed wiring board (PWB); routing; warpage;
  • fLanguage
    English
  • Journal_Title
    Advanced Packaging, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1521-3323
  • Type

    jour

  • DOI
    10.1109/TADVP.2004.841665
  • Filename
    1391073