Title :
Implementing log-add algorithm in hardware
Author :
Melnikoff, S.J. ; Quigley, S.F.
Author_Institution :
Dept. of Electron., Electr. & Comput. Eng., Univ. of Birmingham, UK
fDate :
6/12/2003 12:00:00 AM
Abstract :
A hardware implementation of the log-add algorithm, being a simple method of computing ln(A+B) given ln(A) and ln(B), as used in speech recognition, is presented. It is shown that it can be efficiently implemented in hardware using a small look-up table plus some additional arithmetic logic, with no significant loss of accuracy over direct calculation.
Keywords :
logic circuits; speech recognition; table lookup; arithmetic logic; hardware implementation; log-add algorithm; look-up table; speech recognition;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:20030594
