DocumentCode
1232199
Title
Intel 87C51 and 512 kB CMOS sequential RWM
Author
Matystak, L. ; Moravec, J.
Author_Institution
Coal Res. Inst., Ostrava-Radvanice, Czechoslovakia
Volume
25
Issue
22
fYear
1989
Firstpage
1469
Abstract
Connecting a large block of data memory to a single-chip microcontroller is usually solved by implementing the paging technique: enabling memory pages by the proper number of port lines. The circuitry described in this letter uses a rather different method of addressing, provided the data are accessed mostly sequentially.
Keywords
CMOS integrated circuits; semiconductor storage; 512 kB; addressing; data memory; memory pages; port lines; single-chip microcontroller;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19890985
Filename
35138
Link To Document