DocumentCode
1234980
Title
Wide-range synchronous mirror delay with arbitrary input duty cycle
Author
Cheng, K.-H. ; Su, C.-W. ; Lu, S.-W.
Author_Institution
Dept. of Electron. Eng., Nat. Central Univ., Taoyuan
Volume
44
Issue
11
fYear
2008
Firstpage
665
Lastpage
667
Abstract
A wide-range synchronous mirror delay (SMD) with arbitrary input duty cycle is presented. The proposed SMD utilises the time-to- digital converter for a frequency-range selector and a multiband delay monitor circuit to achieve a wide range of operating frequencies. The simulation results show that the operating frequency is from 200 MHz to 1 GHz and the static phase error is 6.7 ps. The locking time is less than eight clock cycles: two cycles with coarse tune and six cycles with fine tune.
Keywords
delay lock loops; SMD; duty cycle; frequency-range selector; multiband delay monitor circuit; synchronous mirror delay; time-digital converter;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:20080622
Filename
4531506
Link To Document