Title :
Parasitic capacitance effects of planar resistors
Author :
Demurie, Stefaan N. ; De Mey, Gilbert
Author_Institution :
Lab. of Electron., Ghent State Univ., Belgium
fDate :
9/1/1989 12:00:00 AM
Abstract :
The intrinsic capacitance of a planar resistor in a hybrid circuit is discussed. Basic theory is outlined to model the self-capacitance effect of resistive layers. A perturbation method is derived where the zeroth order accounts for the pure resistive effects and the first-order perturbation deals with the capacitive effects. It is shown that even in the absence of contact electrode capacity, any resistive layer creates a capacitive field in the substrate and the surrounding materials. A model is made to describe these intrinsic capacitance effects, and some numerical results are shown
Keywords :
capacitance; hybrid integrated circuits; resistors; hybrid circuit; intrinsic capacitance; numerical results; parasitic capacitance; perturbation method; planar resistors; self-capacitance effect; zeroth order; Conductors; Current density; Electrodes; Hybrid integrated circuits; Integrated circuit interconnections; Parasitic capacitance; Resistors; Software packages; Substrates; Voltage;
Journal_Title :
Components, Hybrids, and Manufacturing Technology, IEEE Transactions on