DocumentCode :
124008
Title :
MAPC: Memory access pattern based controller
Author :
Hussain, Tauqeer ; Palomar, Oscar ; Unsal, Ozan ; Cristal, Adrian ; Ayguade, Eduard ; Valero, M.R.
Author_Institution :
Comput. Sci., Barcelona Supercomput. Center, Barcelona, Spain
fYear :
2014
fDate :
2-4 Sept. 2014
Firstpage :
1
Lastpage :
4
Abstract :
Traditionally, system designers have attempted to improve system performance by scheduling the processing cores and by exploring different memory system configurations and there is comparatively less work done scheduling the accesses at the memory system level and exploring data accesses on the memory systems. In this paper, we propose a memory access pattern based controller (MAPC). MAPC organizes data accesses in descriptors, prioritizes them with respect to the number and size of transfer requests. When compared to the baseline multicore system, the MAPC based system achieves between 2.41× to 5.34× of speedup for different applications, consumes 28% less hardware resources and 13% less dynamic power.
Keywords :
programmable controllers; random-access storage; MAPC; access pattern descriptors; data transfers; memory access pattern based controller; Bandwidth; Data transfer; Hardware; Memory management; Multicore processing; SDRAM; Scheduling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field Programmable Logic and Applications (FPL), 2014 24th International Conference on
Conference_Location :
Munich
Type :
conf
DOI :
10.1109/FPL.2014.6927397
Filename :
6927397
Link To Document :
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