Title :
A gate-quality dielectric system for SiGe metal-oxide-semiconductor devices
Author :
Iyer, S.S. ; Solomon, Paul M. ; Kesan, Vijay P. ; Bright, A.A. ; Freeouf, John L. ; Nguyen, Thao N. ; Warren, Alan C.
Author_Institution :
IBM Thomas, J Watson Res. Center, Yorktown Heights, NY, USA
fDate :
5/1/1991 12:00:00 AM
Abstract :
The authors present a high-quality dielectric system for use with Si/sub 1-x/Ge/sub x/ alloys. The system employs plasma-enhanced chemical vapor deposited (PECVD) SiO/sub 2/ on a thin (6-8-nm) layer of pure silicon grown epitaxially on the Si/sub 1-x/Ge/sub x/ layer. The buffer layer and the deposited oxide prevent the accumulation of Ge at the oxide-semiconductor interface and thus keep the interface state density within acceptable limits. The Si cap layer leads to a sequential turn-on of the Si/sub 1-x/Ge/sub x/ channel and the Si cap channel as is clearly observed in the low-temperature C-V curves. The authors show that this dual-channel structure can be designed to suppress the parasitic Si cap channel. The MOS capacitors are also used to extract valence-band offsets.<>
Keywords :
Ge-Si alloys; dielectric thin films; insulated gate field effect transistors; metal-insulator-semiconductor structures; plasma CVD; semiconductor materials; semiconductor technology; silicon compounds; 6 to 8 nm; MOS capacitors; MOSFETs; PECVD; Si buffer layer; Si cap channel; Si cap layer; Si/sub 1-x/Ge/sub x/ alloys; Si/sub 1-x/Ge/sub x/ channel; Si/sub 1-x/Ge/sub x/-Si-SiO/sub 2/; SiGe MOS devices; dual-channel structure; gate-quality dielectric system; high-quality dielectric system; interface state density; low-temperature C-V curves; valence-band offsets; Buffer layers; Chemicals; Dielectrics; Germanium alloys; Germanium silicon alloys; Interface states; MOS capacitors; Plasma chemistry; Silicon alloys; Silicon germanium;
Journal_Title :
Electron Device Letters, IEEE
