DocumentCode :
1253939
Title :
Flip chip bonding technique using transferred microsolder bumps
Author :
Tsunetsugu, Hideki ; Hayashi, Tsuyoshi ; Hosoya, Masakaze ; Katsura, Kohsuke ; Hirano, Makoto ; Imai, Yuhki
Author_Institution :
NTT Optoelectron. Labs., Tokyo, Japan
Volume :
20
Issue :
4
fYear :
1997
fDate :
10/1/1997 12:00:00 AM
Firstpage :
327
Lastpage :
334
Abstract :
We have improved the microsolder bump technique previously used for fabricating a high-speed photoreceiver for high-speed and wideband coherent optical communication. To eliminate the damage caused by stress during vapor-phase deposition of the solder material and to enable the application of various high-speed electrical and/or photonic devices in conjunction with high-density interconnections, we have developed a flip-chip-bonding technique that uses microsolder bumps with a diameter of about 26 and 40 μm. These bumps are transferred from a carrier substrate to a chip that is then bonded to the final substrate, This technique has three advantages. First, the stress during vapor-phase deposition does not damage the device because the bump formation process is separate from the device formation. Second, many applications are possible because we can make many carrier substrates with various chip sizes and bump pitches on a single Si wafer. Third, the chips with transferred microsolder bumps can be applied to devices that are known to be defect-free because the carrier substrates with the deposited solder bumps are individually aligned face-to-face with the base metal on the devices. We used solder materials of 100% In and 60% Sn-Pb in our experiments. From 8-546 transferred microsolder bumps were successfully formed on 0.5- to 4-mm-square chips (test samples and electrical and photonic devices). We also confirmed that this flip chip bonding was very stable after 1000 heat cycles. This new flip-chip-bonding technique should be very useful for making future high-speed optical transmission systems and the parallel optical interconnections required for electrical and photonic devices that will be used to create stable high-speed and high-density interconnections
Keywords :
flip-chip devices; integrated circuit reliability; integrated optoelectronics; optical interconnections; reflow soldering; 26 micron; 40 micron; In; SnPb; bump formation process; carrier substrate; chip sizes; flip chip bonding technique; heat cycles; high-density interconnections; high-speed optical transmission systems; parallel optical interconnections; transferred microsolder bumps; vapor-phase deposition; Bonding; Closed loop systems; Flip chip; High speed optical techniques; Optical fiber communication; Optical interconnections; Optical materials; Stress; Testing; Wideband;
fLanguage :
English
Journal_Title :
Components, Packaging, and Manufacturing Technology, Part C, IEEE Transactions on
Publisher :
ieee
ISSN :
1083-4400
Type :
jour
DOI :
10.1109/3476.650965
Filename :
650965
Link To Document :
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