DocumentCode :
1254823
Title :
A case for intelligent RAM
Author :
Patterson, David ; Anderson, Thomas ; Cardwell, Neal ; Fromm, Richard ; Keeton, Kimberly ; Kozyrakis, Christoforos ; Thomas, Randi ; Yelick, Katherine
Author_Institution :
Div. of Comput. Sci., California Univ., Berkeley, CA, USA
Volume :
17
Issue :
2
fYear :
1997
Firstpage :
34
Lastpage :
44
Abstract :
Two trends call into question the current practice of fabricating microprocessors and DRAMs as different chips on different fabrication lines. The gap between processor and DRAM speed is growing at 50% per year; and the size and organization of memory on a single DRAM chip is becoming awkward to use, yet size is growing at 60% per year. Intelligent RAM, or IRAM, merges processing and memory into a single chip to lower memory latency, increase memory bandwidth, and improve energy efficiency. It also allows more flexible selection of memory size and organization, and promises savings in board area. This article reviews the state of microprocessors and DRAMs today, explores some of the opportunities and challenges for IRAMs, and finally estimates performance and energy efficiency of three IRAM designs
Keywords :
microprocessor chips; performance evaluation; random-access storage; IRAM; energy efficiency; intelligent RAM; memory latency; microprocessors; performance; single chip; Bandwidth; Clocks; Computer aided software engineering; Databases; Delay; Out of order; Pins; Random access memory; Read-write memory; Sparse matrices;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/40.592312
Filename :
592312
Link To Document :
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