A 4-Mb low-temperature DRAM

Author

Henkels, Walter H. ; Wen, Duen-shun ; Mohler, Rick L. ; Franch, Robert L. ; Bucelot, Thomas J. ; Long, Christopher W. ; Bracchitta, John A. ; Cote, W.J. ; Bronner, Gary B. ; Taur, Yuan ; Dennard, Robert H.

Author_Institution

IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA

Volume

26

Issue

11

fYear

1991

fDate

11/1/1991 12:00:00 AM

Firstpage

1519

Lastpage

1529

Abstract

The authors present the characterization of the first dynamic RAM (DRAM) fabricated in a technology specifically optimized for cryogenic operation. With the power supply adjusted to assure hot-electron reliability, the 25-ns 4-Mb low-temperature (LT) chips operated 3 times faster than conventional chips. The LT-optimized chips functioned properly with cycle times as fast as 45 ns, and with a toggle-mode data rate of 667 Mb/s. Wide operating margins and a very large process window for data retention were demonstrated. At a temperature of 85 K the storage retention time of the trench-capacitor memory cells exceeded 8 h. This study shows that the performance leverage offered by low temperature applies equally well to DRAM and to logic. There is no limitation inherent to memory

Keywords

DRAM chips; circuit reliability; cryogenics; hot carriers; 25 ns; 4 Mbit; 667 Mbit/s; 85 K; cryogenic operation; data retention; dynamic RAM; hot-electron reliability; low-temperature DRAM; storage retention; trench-capacitor memory cells; CMOS logic circuits; CMOS technology; Delay effects; Logic devices; MOS devices; Paper technology; Random access memory; Temperature; Threshold voltage; Time of arrival estimation;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.98967

Filename

98967