Package design methodology in consideration with signal integrity, power integrity and electromagnetic immunity

A design concept and methodology for package with consideration on signal integrity, power integrity and electromagnetic immunity is proposed in this paper. Each part of the package such as bonding wire, via or bump has a significant influence on the performance of entire chip-package-board system, and these effects to signal, power integrity prosperities are discussed based on the numerical analysis method and SPICE-like simulator. Furthermore, a novel design for filter in package is proposed for enhancing immunity of integrated circuits. Finally, the methodology for design optimization can be achieved based on the analysis results.