Title :
Novel Dielectric-Engineered Trapping-Charge Poly-Si-TFT Memory With a TiN–Alumina–Nitride–Vacuum–Silicon Structure
Author :
Wu, Chun-Yu ; Liu, Yen-Ting ; Liao, Ta-Chuan ; Yu, Ming H. ; Cheng, Huang-Chung
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Abstract :
High-performance poly-Si-TFT-based TiN-alumina-nitride-vacuum-silicon (TANVAS) trapping-charge memory has been demonstrated utilizing high-k blocking oxide and vacuum tunneling layer for the first time. In particular, the vacuum, lowest k in nature, was introduced to replace the traditional tunneling oxide. Furthermore, the alumina high-k blocking oxide was applied to upgrade the electric field across the tunneling layer. Based on the enlarged k-value difference between the blocking and tunneling layers, the TANVAS featured considerable field enhancement across the tunneling layer, thus much improving the program/erase efficiencies. In addition, owing to the suppression of defect creation in the tunneling layer, the TANVAS also exhibited superior retention characteristics. These excellent memory characteristics of TANVAS are therefore promising for the 3-D Flash and system-on-panel applications.
Keywords :
semiconductor storage; thin film transistors; 3D flash; TANVAS trapping-charge memory; TiN; TiN-alumina-nitride-vacuum-silicon structure; alumina high-k blocking oxide; defect creation; dielectric-engineered trapping-charge poly-Si-TFT memory; electric field; high-performance poly-Si-TFT-based TiN-alumina-nitride-vacuum-silicon; memory characteristics; retention characteristics; system-on-panel application; tunneling oxide; vacuum tunneling layer; Aluminum oxide; Dielectrics; High K dielectric materials; Logic gates; SONOS devices; Silicon; Tunneling; Field-enhanced nanowire (FEN); high-$k$ ; poly-Si; system-on-panel (SOP); thin-film transistors (TFTs); trapping-charge memory;
Journal_Title :
Electron Device Letters, IEEE
DOI :
10.1109/LED.2011.2158053