Title :
Some Clarifications on “Compact Modeling and Analysis of Through-Si-Via Induced Electrical Noise Coupling in Three-Dimensional ICs”
Author :
Chuan Xu ; Suaya, Roberto ; Banerjee, Kunal
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of California at Santa Barbara, Santa Barbara, CA, USA
Abstract :
The following clarifications are offered to allow the readers to easily understand some of the results in the authors´ previous paper “Compact Modeling and Analysis of Through-Si-Via Induced Electrical Noise Coupling in Three-Dimensional ICs”.
Keywords :
coupled circuits; elemental semiconductors; integrated circuit modelling; integrated circuit noise; silicon; three-dimensional integrated circuits; Si; compact analysis; compact modeling; electrical noise coupling; three-dimensional IC; through-silicon-via technology; Analytical models; Couplings; Educational institutions; Integrated circuit modeling; Mathematical model; Noise; Through-silicon vias; 3-D integrated circuit; Active region; Through-Silicon-Via (TSV); body effect; compact model; coupling coefficient; impedance, noise;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2012.2209431
