DocumentCode :
1267318
Title :
UNISM: Unified Scheduling and Mapping for General Networks on Chip
Author :
Ou He ; Sheqin Dong ; Wooyoung Jang ; Jinian Bian ; Pan, David Z.
Author_Institution :
Electr. & Comput. Eng. Dept., Univ. of Texas, Austin, TX, USA
Volume :
20
Issue :
8
fYear :
2012
Firstpage :
1496
Lastpage :
1509
Abstract :
Task scheduling and core mapping have a significant impact on the overall performance of network on chip (NOC). In this paper, a unified task scheduling and core mapping algorithm called UNISM is proposed for different NOC architectures including regular mesh, irregular mesh and custom networks. First, a unified model combining scheduling and mapping is introduced using mixed integer linear programming (MILP). Then, a novel graph model is proposed to consider the network irregularity and estimate communication energy and latency, since the number of network hops is not accurate enough for irregular mesh and custom networks. To make the MILP-based UNISM scalable, a heuristic is employed to speed up our method. Compared with two previous state-of-the-art works, experimental results show that more than 15% and 11.5% improvement on the execution time is achieved with similar energy consumption on average for regular mesh NOC. For irregular and custom NOC, the improvement is 27.3% and 14.5% on the execution time with 24.3% and 18.5% lower energy. Moreover, our method is scalable for large benchmarks in terms of runtime.
Keywords :
integer programming; linear programming; network topology; network-on-chip; processor scheduling; MILP; UNISM; communication energy; core mapping; custom networks; execution time; graph model; irregular mesh; mixed integer linear programming; network irregularity; network-on-chip; task scheduling; unified scheduling and mapping; Computer architecture; Energy consumption; Job shop scheduling; Network-on-chip; Processor scheduling; Very large scale integration; Core mapping; network on chip (NOC); network topology; task scheduling;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2011.2159280
Filename :
5945010
Link To Document :
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