Title :
A 64–84-GHz PLL With Low Phase Noise in an 80-GHz SiGe HBT Technology
Author :
Liu, Gang ; Trasser, Andreas ; Schumacher, Hermann
Author_Institution :
Inst. of Electron Devices & Circuits & the Competence Center on Integrated Circuits in Commun., Ulm Univ., Ulm, Germany
Abstract :
This paper presents a 64-84-GHz phase-locked loop (PLL) realized in a low-cost 80-GHz HBT technology. The circuit consists of a wide tuning-range voltage-controlled oscillator, a push-push frequency doubler, a divide-by-32 frequency divider, a phase detector and an active loop filter. The measured phase noise at 1-MHz offset is -106 dBc/Hz. The output power is -2.5 dBm at 64 GHz, and it slowly decreases to -8.1 dBm at 84 GHz, with a maximum dc power consumption of 517 mW. To the authors´ knowledge, the circuit achieves the widest frequency tuning range and its in-band phase noise is the lowest among the fully integrated V/W-band PLLs reported to date.
Keywords :
Ge-Si alloys; active filters; circuit tuning; frequency dividers; heterojunction bipolar transistors; phase detectors; phase locked loops; phase noise; power consumption; voltage-controlled oscillators; PLL; SiGe; active loop filter; dc power consumption; divide-by-32 frequency divider; frequency 1 MHz; frequency 64 GHz to 84 GHz; frequency tuning; in-band phase noise; low phase noise; low-cost HBT technology; measured phase noise; phase detector; phase-locked loop; power 517 mW; push-push frequency doubler; wide tuning-range voltage-controlled oscillator; Bandwidth; Frequency conversion; Phase locked loops; Phase noise; Transistors; Tuning; Voltage-controlled oscillators; Heterojunction bipolar transistors (HBTs); millimeter-wave (mm-wave) integrated circuits (ICs); phase-locked loops (PLLs);
Journal_Title :
Microwave Theory and Techniques, IEEE Transactions on
DOI :
10.1109/TMTT.2012.2213833
