• DocumentCode
    1284095
  • Title

    Placement Optimization of Flexible TFT Digital Circuits

  • Author

    Liu, Chester ; Ma, En-Hua ; Wei, Wen-En ; Li, James Chien-Mo ; Cheng, I-Chun ; Yeh, Yung-Hui

  • Author_Institution
    Nat. Taiwan Univ., Taipei, Taiwan
  • Volume
    28
  • Issue
    6
  • fYear
    2011
  • Firstpage
    24
  • Lastpage
    31
  • Abstract
    Mechanical strain significantly affects thin-film transistor (TFT) device mobility; thus, strain awareness is indispensable to flexible TFT circuit design. This article presents a strain-aware placement technique to enhance TFT logic circuit performance in the presence of mechanical stress.
  • Keywords
    internal stresses; logic circuits; logic design; semiconductor device manufacture; thin film transistors; TFT logic circuit; flexible TFT circuit design; flexible TFT digital circuits; mechanical strain; mechanical stress; placement optimization; strain awareness; strain-aware placement technique; thin-film transistor cicruit; Logic gates; Organic thin film transistors; Strain measurement; Thin film transistors; Transistors; design and test; digital circuits; flexible TFT; placement optimization;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2011.92
  • Filename
    5963626
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1284095