USJ engineering impacts on FinFETs and RDF investigation using full 3D process/device simulation

The impacts of FinFET channel and extension S/D region implantations on relevant device parameters such as electrostatic control and Vth mismatch (MM) are investigated. We used 3D TCAD process and device simulations to gain physical understanding and to optimize the performance/variability of bulk-FinFETs. For the first time, the full FinFET process flow simulation was performed using diffusion, activation and segregation models identical to those used in planar nodes. In this work a wide range of implantation and anneal splits is used to demonstrate the 3D simulation accuracy. After achieving good agreement with experiments in terms of Vth and Ion/Ioff, considering lateral dopant diffusion and activation, the simulation was used to investigate SRAM random doping fluctuation RDF.