• DocumentCode
    128906
  • Title

    MC/DD study of metal grain induced current variability in a nanoscale InGaAs FinFET

  • Author

    Seoane, N. ; Aldegunde, Manuel ; Kalna, Karol ; Garcia-Loureiro, Antonio J.

  • Author_Institution
    Electron. Syst. Design Centre, Swansea Univ., Swansea, UK
  • fYear
    2014
  • fDate
    9-11 Sept. 2014
  • Firstpage
    253
  • Lastpage
    256
  • Abstract
    The on- and off-current variability due to TiN metal grain workfunction fluctuations in a 10.4 nm gate length In0.53Ga0.47As FinFET is analysed using two in-house simulation tools based on the finite element method: a 3D Drift-Diffusion device simulator and a 3D ensemble Monte Carlo simulator, that include quantum-corrections through the density gradient approach. The Id-Vg characteristics have been compared in the sub-threshold region against ballistic NEGF simulations, showing an excellent agreement. Monte Carlo simulations, considering a 〈100〉 channel orientation, show a larger on-current variability, over a 120% increase, compared with the results from Drift-Diffusion simulations. In this study, three different metal grain sizes (10, 7 and 5 nm) have been analysed. We have observed that the underestimation of the variability when using Drift-Diffusion simulations is increasing with a reduction in the grain size.
  • Keywords
    III-V semiconductors; MOSFET; Monte Carlo methods; gallium arsenide; grain size; indium compounds; titanium compounds; 3D Drift-Diffusion device simulator; 3D ensemble Monte Carlo simulator; InGaAs; MC-DD study; ballistic NEGF simulations; channel orientation; density gradient approach; finite element method; in-house simulation tool; metal grain size reduction; metal grain-induced current variability; nanoscale FinFET; off-current variability; on-current variability; quantum-corrections; size 10 nm; size 10.4 nm; size 5 nm; size 7 nm; sub-threshold region; titanium nitride metal grain workfunction fluctuation; variability underestimation; FinFETs; Grain size; Logic gates; Monte Carlo methods; Three-dimensional displays; Tin;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Simulation of Semiconductor Processes and Devices (SISPAD), 2014 International Conference on
  • Conference_Location
    Yokohama
  • ISSN
    1946-1569
  • Print_ISBN
    978-1-4799-5287-8
  • Type

    conf

  • DOI
    10.1109/SISPAD.2014.6931611
  • Filename
    6931611