DocumentCode
129298
Title
Reconfigurable silicon nanowire devices and circuits: Opportunities and challenges
Author
Weber, Walter M. ; Trommer, Jens ; Grube, Matthias ; Heinzig, Andre ; Konig, Markus ; Mikolajick, Thomas
Author_Institution
NaMLab gGmbH, Dresden, Germany
fYear
2014
fDate
24-28 March 2014
Firstpage
1
Lastpage
6
Abstract
Reconfigurable fine-grain electronics target an increase in the number of integrated logic functions per chip by enhancing the functionality at the device level and by implementing a compact and technologically simple hardware platform. Here we study a promising realization approach by employing reconfigurable nanowire transistors (RFETs) as the multifunctional building-blocks to be integrated therein. RFETs merge the electrical characteristics of unipolar n- and p- type FETs into a single universal device. The switch comprises four terminals, where three of them act as the conventional FET electrodes and the fourth acts as an electric select signal to dynamically program the desired switch type. The transistor consists of two independent charge carrier injection valves as represented by two gated Schottky junctions integrated within an intrinsic silicon nanowire. Radial compressive strain applied to the channel is used as a scalable method to adjust n- and p-FET currents to each other, thereby enabling complementary logic circuits. Simple but relevant examples for the reconfiguration of complete gates will be given, demonstrating the potential of this technology.
Keywords
Schottky barriers; compressive strength; elemental semiconductors; field effect transistors; logic circuits; nanoelectronics; nanowires; silicon; FET electrodes; RFET; Schottky junctions; charge carrier injection valves; complementary logic circuits; hardware platform; integrated logic functions; radial compressive strain; reconfigurable fine grain electronics; reconfigurable nanowire transistors; reconfigurable silicon nanowire devices; unipolar n-type FET; unipolar p-type FET; Charge carriers; Field effect transistors; Junctions; Logic gates; Nanoscale devices; Silicon; Tunneling; RFET; Reconfigurable transistor; Schottky FET; doping free CMOS; inverter; nanowire; reconfigurable circuit; symmetric FET; universal transistor;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014
Conference_Location
Dresden
Type
conf
DOI
10.7873/DATE.2014.249
Filename
6800450
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