92% High Efficiency and Low Current Mismatch Interleaving Power Factor Correction Controller With Variable Sampling Slope and Automatic Loading Detection Techniques

Author

Yi-Ping Su ; Chun-Yen Chen ; Chia-Lung Ni ; Yu-Chai Kang ; Yi-Ting Chen ; Jen-Chieh Tsai ; Ke-Horng Chen ; Shih-Ming Wang ; Chao-Chiun Liang ; Chang-An Ho ; Tun-Hao Yu

Author_Institution

Inst. of Electr. & Comput. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan

Volume

28

Issue

11

fYear

2013

fDate

Nov. 2013

Firstpage

5159

Lastpage

5173

Abstract

This paper proposes the dual nondeadtime variable sampling slope technique to carry out precise phase sensing and suppress phase error in interleaving power factor correction (PFC) controller over a whole ac switching cycle for low current mismatch. Furthermore, the proposed automatic loading detection (ALD) technique can keep efficiency higher than 92% over a wide load range due to accurately controlling the ON/OFF of dual phases. The test circuit fabricated in the TSMC 0.5-μm 800-V UHV process shows that the highly integrated interleaving PFC can deliver a high power of 180 W and a high efficiency of 95% at an output power of 180 W.

Keywords

power control; power factor; PFC controller; UHV process; automatic loading detection techniques; dual nondeadtime variable sampling slope technique; dual phases; high efficiency mismatch interleaving power factor correction controller; highly integrated interleaving PFC; low current mismatch interleaving power factor correction controller; power 180 W; proposed automatic loading detection technique; variable sampling slope; Inductors; Loading; Power factor correction; Power generation; Switches; Zero current switching; Automatic loading detection (ALD); dual nondeadtime variable sampling slope (DNVSS); interleaving power factor correction (PFC);

fLanguage

English

Journal_Title

Power Electronics, IEEE Transactions on

Publisher

ieee

ISSN

0885-8993

Type

jour

DOI

10.1109/TPEL.2013.2240395

Filename

6412805