Iterative impedance analysis method on high integrated impedance network

An iterative type impedance analysis method for an impedance network is presented. The whole impedance network is divided into several sub-networks and each sub-network is analysed in a form of the linear voltage-current relation. The analysed voltage-current relation is iteratively applied to obtain the whole impedance. An illustrated example is given to show that the proposed method is simple and effective to analyse the impedance of a network which has a very large number of impedance elements.