Design of a CMOS LC-VCO with low phase noise for UHF RFID reader

Author

Mi Tian ; Zhigong Wang ; Jian Xu

Author_Institution

Inst. of RF- & OE-ICs, Southeast Univ., Nanjing, China

fYear

2014

fDate

27-30 Aug. 2014

Firstpage

1

Lastpage

3

Abstract

In this paper, a CMOS LC-VCO with low phase noise for UHF RFID reader is proposed. A symmetrical second-harmonic resonant filtering technology is adopted to suppress the phase noise. The proposed LC-VCO is designed in Jazz 0.18 μm SiGe BiCMOS technology. The post-simulation results show that in the whole tuning range of 1.45 GHz to 2.02 GHz, the designed VCO has an excellent phase noise of lower than -130 dBc/Hz@1 MHz and a highly linear VCO gain of 65 MHz/V.

Keywords

BiCMOS integrated circuits; CMOS integrated circuits; Ge-Si alloys; LC circuits; UHF circuits; harmonic generation; integrated circuit design; phase noise; radiofrequency identification; voltage-controlled oscillators; BiCMOS technology; CMOS LC-VCO; SiGe; UHF RFID reader; frequency 1.45 GHz to 2.02 GHz; low phase noise; size 0.18 mum; symmetrical second harmonic resonant filtering technology; CMOS integrated circuits; Capacitors; Harmonic analysis; Phase noise; Radiofrequency identification; Tuning; Voltage-controlled oscillators; VCO; VCO gain; phase noise; switching capacitor array; symmetrical second-harmonic resonant filtering;

fLanguage

English

Publisher

ieee

Conference_Titel

Radio-Frequency Integration Technology (RFIT), 2014 IEEE International Symposium on

Conference_Location

Hefei

Type

conf

DOI

10.1109/RFIT.2014.6933245

Filename

6933245