Time resolution of NMOS sampling switches used on low-swing signals

Author

Johansson, Henrik O. ; Svensson, Christer

Author_Institution

Dept. of Phys. & Meas. Technol., Linkoping Univ., Sweden

Volume

33

Issue

2

fYear

1998

fDate

2/1/1998 12:00:00 AM

Firstpage

237

Lastpage

245

Abstract

A number of recently reported CMOS line receivers and downconversion mixers are based on sampling. A key component in these designs is the NMOS sampling switch. It can sample a very high bandwidth signal, several GHz for a 0.8-μm transistor. We present an expression for the aperture time for an NMOS switch when the input has low swing. The switch can, under this condition, be modeled as a device that determines a weighted average over time of the input signal. The weight function is derived. The aperture time function shows that the maximum theoretical time resolution for a switch in 0.8-μm standard CMOS is 21 ps (~48 Gb/s). SPICE simulations agree with the theory. Transient two-dimensional (2-D) device simulations do not contradict the predicted results. Experiments on a switch made in a 0.8-μm standard CMOS process show successful sampling of every thirty second bit of a 5-Gb/s data stream

Keywords

CMOS integrated circuits; field effect transistor switches; sample and hold circuits; signal sampling; 0.8 micron; 21 ps; 5 Gbit/s; NMOS sampling switches; aperture time function; high bandwidth signal sampling; low-swing signals; model; standard CMOS process; time resolution; transient 2D device simulations; weight function; Apertures; Bandwidth; MOS devices; Predictive models; SPICE; Sampling methods; Semiconductor device modeling; Signal resolution; Switches; Two dimensional displays;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.658625

Filename

658625