DocumentCode
1322147
Title
Modeling of SOI-LDMOS Transistor Including Impact Ionization, Snapback, and Self-Heating
Author
Radhakrishna, Ujwal ; DasGupta, Amitava ; DasGupta, Nandita ; Chakravorty, Anjan
Author_Institution
Dept. of Electr. Eng., Indian Inst. of Technol. Madras, Chennai, India
Volume
58
Issue
11
fYear
2011
Firstpage
4035
Lastpage
4041
Abstract
A physics-based compact model for silicon-on-insulator lateral double-diffused metal-oxide-semiconductor transistors including impact ionization, subsequent snapback (SB), and self-heating (SH) is presented. It is observed that the SB effect is caused by the turn-on of the associated parasitic bipolar transistor. The model includes the effect of device SH using resistive thermal networks for each region. Comparisons of modeling results with device simulation data show that, over a wide range of bias voltages, the model exhibits excellent accuracy without any convergence problem.
Keywords
MOSFET; bipolar transistors; impact ionisation; silicon-on-insulator; SB effect; SOI-LDMOS transistor; associated parasitic bipolar transistor; bias voltages; device SH; device simulation data; impact ionization; physics-based compact model; resistive thermal networks; self-heating; silicon-on-insulator lateral double-diffused metal-oxide-semiconductor transistors; subsequent snapback; Current density; Data models; Integrated circuit modeling; Logic gates; MOSFET circuits; Substrates; Transistors; Compact model; impact ionization (II); lateral double-diffused metal–oxide–semiconductor (LDMOS); self-heating (SH); silicon-on-insulator (SOI) technology; snapback (SB);
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2011.2165724
Filename
6020770
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